Instructions longer than 32 bits occupy those instruction slots explicitly indicated by the header as containing a long instruction.
An instruction longer than 32 bits is composed of one instruction slot
starting with either 0 or 100, followed by zero
or more instruction slots starting with 101, and finally
terminated by one instruction slot starting with 11.
When an instruction slot begins with 0 its first sixteen
bits contain a 16-bit instruction; the initial 0 bit that usually indicates such an
instruction can be thought of as being omitted, or the intial 0 bit can be thought of
as being that bit. Only the first instruction slot in a long instruction may
have this form.
This 16-bit instruction will execute before the long instruction which follows it.
Otherwise, the first instruction slot of an instruction longer than 32 bits
will begin with 100.
Any additional instruction slots other than the last instruction slot
in a long instruction will begin with 101.
The instructions of this form that are designated as nominally 48 bits, as they occupy two 32-bit instruction slots, but with one embedded 16-bit instruction, have the formats shown in this diagram:
and the 64-bit, 80-bit and 96-bit instructions have this form:
While 11 can only begin the last instruction
slot of a long instruction, and both 0 and 100 can only begin the first
instruction slot of a long instruction, 101 can only begin
any instruction slot in a long instruction that is neither the first or last one.
This is required to ensure that the actions to be taken in decoding each instruction slot of a long instruction are completely unambiguous.
It is envisaged that a normal implementation of this architecture, aimed at providing high performance, will take advantage of the design of this ISA which permits all the instructions in a 256-bit block to be decoded in parallel after any header bits are processed.
When a branch is performed, the entire block in which the branch target is located must be decoded to insure that no attempt is made to interpret data contained in instruction slots not used for instructions, but instead for data used as pseudo-immediate values.
Therefore, it is necessary to distinguish the first instruction slot in a long instruction unambigously from intermediate instruction slots, to prevent an accidental attempt to decode the middle of a long instruction as the beginning of a long instruction when a long instruction is split across blocks. The primary reason for this is to ensure that no attempt is made to decode something that was never intended to be decoded, so as to avoid the remote possibility of an error in decoding, but this also has the benefit of preventing branching into the middle of an instruction, even if only in the case where instructions are split across blocks.