Instructions longer than 32 bits may be present in blocks with a header in the Type I, Type II, Type III, Type VII, and Type VIII formats.
The formats of 48-bit instructions are shown below: these instructions may begin with
0111, which is unused for 32-bit instructions because it begins the Type I
block header, or they may begin with 1101 followed by any two bits, followed
by 1, as this begins a valid set of paired 15-bit instructions, which are
not used as instructions within block types that provide for variable-length instructions.
Note that among the memory reference instructions shown in lines 9 through 13, there are memory-to-register operate instructions, which is why a C bit is present, some of which are included in the 32-bit instruction set as supplemental memory-reference instructions of the second kind, and there are memory-to-registers acting on types of data other than the most basic types, some of the load and store instructions among which are included in the 32-bit instruction set as supplemental memory-reference instructions of the first kind.
Also note the presence of a bit marked as S. This bit is used to indicate scaled indexing; if the instruction is indexed, and the type of operand of the instruction is other than byte, the value in the index register is shifted left before use by as many places as appropriate so that the index is in units of the operand length; one place for halfwords, two places for integer and floating values, three places for long and double values, and four places for quad values. In the case of Medium floating-point operands, a shift of one place to the left is applied in accordance with their alignment, as opposed to attempting to multiply by six during address calculation.
In lines 14 through 18, additional memory reference instructions are shown. These have a shorter opcode, and thus they provide a more limited set of operations, but they contain a three-bit scaled field. This indicates the number of places the value taken from the index register is to be shifted left before use; in this way, index scaling is not limited to operand size, but may also refer to structures containing values, as long as the displacement is a power of two and not overly large.
Packed decimal and string instructions also perform operations, and the instructions of these types which are 64 bits long or longer do have a C bit. The 48-bit form of these instructions, however, does not include a C bit, and thus does not have the option of affecting the condition codes, because room for that bit was not available.
The formats of 64-bit instructions are shown below: these instructions, as well as those longer than
64 bits, begin with 1110, followed by two bits, followed by 1, which is also
a combination guaranteed to indicate a set of paired 15-bit short instructions with a valid first
instruction, and thus a portion of the opcode space not used for 32-bit instructions.
The reason that one bit of the instruction is interposed before the sequence of bits that indicates the length of the instruction is apparent from the diagrams: since that sequence of bits varies in length, having a bit of the instruction precede the sequence allows that bit to be used as the C bit for operate instructions, which indicates whether the instruction is allowed to set the condition codes, and that allows that bit to have the same position for all instructions of this type.
The 80-bit un-indexed three-operand string translate instruction is shown below:
and then the fully-indexed 96-bit translate instruction:
It is also possible to represent a 48-bit instruction, but not other long instructions, as a 64-bit instruction that can be executed within code without headers.
This representation has the form:
11000011 (bits 0-7) (bits 16-31) 11000111 (bits 8-15) (bits 32-47)
Thus, the first sixteen bits of the instruction are split, and the two remaining 16-bit parts of the instruction, each of which may contain an address constant, are left intact.
This makes use of certain unused opcodes in paired 15-bit instructions that weren't used to extend the primary instruction set, not being distributed conveniently for that purpose.