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Decimal Exponent Floating-Point

The following instructions:

000700 100xxx  SWMDE  Swap Medium Decimal Exponent
000700 101xxx  CMDE   Compare Medium Decimal Exponent
000700 102xxx  LMDE   Load Medium Decimal Exponent
000700 103xxx  STMDE  Store Medium Decimal Exponent
000700 104xxx  AMDE   Add Medium Decimal Exponent
000700 105xxx  SMDE   Subtract Medium Decimal Exponent
000700 106xxx  MMDE   Multiply Medium Decimal Exponent
000700 107xxx  DMDE   Divide Medium Decimal Exponent

000700 112xxx  LUMDE  Load Unnormalized Medium Decimal Exponent
000700 113xxx  STUMDE Store Unnormalized Medium Decimal Exponent
000700 114xxx  AUMDE  Add Unnormalized Medium Decimal Exponent
000700 115xxx  SUMDE  Subtract Unnormalized Medium Decimal Exponent
000700 116xxx  MUMDE  Multiply Unnormalized Medium Decimal Exponent
000700 117xxx  DUMDE  Divide Unnormalized Medium Decimal Exponent

000700 120xxx  SWDDE Swap Double Decimal Exponent
000700 121xxx  CDDE  Compare Double Decimal Exponent
000700 122xxx  LDDE  Load Double Decimal Exponent
000700 123xxx  STDDE Store Double Decimal Exponent
000700 124xxx  ADDE  Add Double Decimal Exponent
000700 125xxx  SDDE  Subtract Double Decimal Exponent
000700 126xxx  MDDE  Multiply Double Decimal Exponent
000700 127xxx  DDDE  Divide Double Decimal Exponent

000700 132xxx  LUDDE  Load Unnormalized Double Decimal Exponent
000700 133xxx  STUDDE Store Unnormalized Double Decimal Exponent
000700 134xxx  AUDDE  Add Unnormalized Double Decimal Exponent
000700 135xxx  SUDDE  Subtract Unnormalized Double Decimal Exponent
000700 136xxx  MUDDE  Multiply Unnormalized Double Decimal Exponent
000700 137xxx  DUDDE  Divide Unnormalized Double Decimal Exponent

perform arithmetic on floating-point numbers which are composed of two binary values, an exponent and a mantissa, but the exponent is interpreted as a power of ten. The same basic data type was used with John von Neumann's JOSS interpreter, and allows reasonably efficient floating-point arithmetic which yields exact decimal results; all operations are done in binary, with only the normalization required afterwards involving successive multiplications or divisions by ten instead of shifts.

The regular floating-point registers are used to hold operands of these types; however, separate decimal exponent load and store instructions are provided, unlike the case with register packed numbers, because a floating-point number may be converted into a modified internal form when loaded into a floating-point register, and such modifications will be different for these types.

The Medium Decimal Exponent Floating type has the following format: one sign bit, followed by an eight-bit exponent in excess-128 notation, followed by a 39-bit mantissa.

In this format, there are two distinct ranges of normalized mantissas, to make the most efficient use of the binary space reserved for a mantissa.

2^39 - 1 is 549,755,813,887, and, thus, most floating-point mantissas will represent eleven decimal digits, followed by a final guard digit which may be either 0, 2, 4, 6, or 8; but a small range of numbers will have a twelfth decimal digit, as follows:

High Range:
 549,755,813,880    1.09951142376
 549,755,813,879    1.099511423758
...
 500,000,000,001    1.000000000002
 500,000,000,000    1.00000000000

Low Range:
 499,999,999,999    0.999999999998
 499,999,999,998    0.999999999996
...
 499,999,999,995    0.99999999999
...
  54,975,581,390    0.10995114238
  54,975,581,389    0.109951142378

The Double Decimal Exponent Floating type has the following format: one sign bit, followed by an eleven-bit exponent in excess-1024 notation, followed by a 52-bit mantissa.

2^52 - 1 is 4,503,599,627,370,495, and, thus, most floating-point mantissas will represent fifteen decimal digits, followed by a final guard digit representing an additional fraction of 0, 1/4, 1/2, or 3/4, but a small range of numbers will have a sixteenth decimal digit, as follows:

High Range:
 4,503,599,627,370,480    1.125899906842620
 4,503,599,627,370,479    1.12589990684261975
...
 4,000,000,000,000,001    1.00000000000000025
 4,000,000,000,000,000    1.000000000000000

Low Range:
 3,999,999,999,999,999    0.99999999999999975
 3,999,999,999,999,998    0.9999999999999995
 3,999,999,999,999,997    0.99999999999999925
 3,999,999,999,999,996    0.999999999999999
...
   450,359,962,737,052    0.112589990684263
   450,359,962,737,051    0.11258999068426275
   450,359,962,737,050    0.1125899906842625
   450,359,962,737,049    0.11258999068426225

In both cases, it is permitted for a computation to produce a super-normalized result that slightly exceeds the upper limit of the high range shown, bringing the mantissa up to its maximum possible binary value, since the test for a result requiring division by ten to be normalized will be based on a binary carry out.

As well, the fraction 1/10, when expressed in binary, is 0.0001100110011001100110011... and, thus, the threshold for multiplying by 10 may be set as the simpler quantity 0.00011, rather than the precise lower limit of the low ranges shown above, allowing denormal numbers with mantissas as low as 51,539,607,552, representing 0.103079215104, for the Medium Decimal Exponent Floating data type, and with mantissas as low as 422,212,465,065,984, representing 0.105553116266496, for the Long Decimal Exponent Floating data type. Thus, this means that the extra digit, although possible for a narrow range of numbers, is only guaranteed to be present for a significantly narrower range of numbers.

Except in the case where a 24-bit word is specified instead of a 32-bit word, in which case the opcodes for instructions acting on the Long Decimal Exponent Floating data type will act on operands having the format of the Medium Decimal Exponent Floating data type as described here, this data type is not available when any alternate memory width is specified.

Note that, since these decimal exponent floating-point types still involve a mantissa in binary form, and a partial digit is present at the end of numbers in both of these formats, the difference between the exponents of the high and low portions of a compound floating-point number would not be an integer, even if the low portion extended the mantissa with additional decimal digits instead of continuing on as a portion of a purely binary mantissa. Therefore the multiply extensibly and divide extensibly operations are not provided for this type, as there exists no appropriate way to define them.

If this architecture is expanded so that other Decimal Exponent Floating data types are defined, it is possible that for some of them the high portion of the mantissa range would be so narrow that instead of merely shortening the guaranteed high portion, a simple multiply-by-ten test based on binary 0.00011 (or 3/32nds) would lead to some denormal quantities having one decimal digit of precision less than numbers in the low portion. In that case, the test used would be changed to have a threshold of binary 0.000110011 (or 51/512ths) or to a more precise test if required to avoid this, so that the standard precision for the low portion of the mantissa range would be guaranteed despite the presence of an allowed denormal range. In that case, the more precise test used would apply to all Decimal Exponent Floating formats defined.

Due to the repetitive nature of the fraction 1/10 represented in binary, when it is necessary to divide a mantissa by 10 to align it, it may be noted that multiplying a number by 32/5 (or 64 times 1/10) can be broken down into a small number of shift and add operations:

Multiplying by:

 1.100110011001100110011001100110011001100110011001100110011001100

is equivalent to multiplying by:

 1.1
 1.00000000000000000000000000000001
 1.0000000000000001
 1.00000001
 1.0001

This algorithm, or a similar one, or perhaps an even better one, was described by Robin A. Vowels in a 1992 paper in the Australian Computer Journal.

It may also be noted that instead of performing five consecutive shifts and adds, one could simply leave 1.1 times the input as two numbers, the input and .1 times the input. Doing the next multiplication the same way, copying and shifting without actually doing the addition, leaves one with four numbers to work with. These four numbers can then be reduced to two using two carry-save adder stages, and then another lazy multiplication increases the number of numbers to four again. In this way, one would only need to propagate carries after the final multiplication.

Targeted Arithmetic

As well, a few additional instructions are provided for the regular register compressed formats that provide targeted arithmetic. These instructions, so that they can retain the same standard format as other instructions with a register type, where a zero base register indicates a register-to-register instruction, use the 32-bit prefix form to allow additional room in the instruction for the target exponent.

141070 00nnnn 104xxx  ATMDE   Add Targeted Medium Decimal Exponent
141070 00nnnn 105xxx  STMDE   Subtract Targeted Medium Decimal Exponent
141070 00nnnn 106xxx  MTMDE   Multiply Targeted Medium Decimal Exponent
141070 00nnnn 107xxx  DTMDE   Divide Targeted Medium Decimal Exponent

141070 00nnnn 114xxx  AETMDE  Add Extensibly Targeted Medium Decimal Exponent
141070 00nnnn 115xxx  SETMDE  Subtract Extensibly Targeted Medium Decimal Exponent
141070 00nnnn 116xxx  METMDE  Multiply Extensibly Targeted Medium Decimal Exponent
141070 00nnnn 117xxx  DETMDE  Divide Extensibly Targeted Medium Decimal Exponent

141070 00nnnn 124xxx  ATDDE   Add Targeted Double Decimal Exponent
141070 00nnnn 125xxx  STDDE   Subtract Targeted Double Decimal Exponent
141070 00nnnn 126xxx  MTDDE   Multiply Targeted Double Decimal Exponent
141070 00nnnn 127xxx  DTDDE   Divide Targeted Double Decimal Exponent

141070 00nnnn 134xxx  AETDDE  Add Extensibly Targeted Double Decimal Exponent
141070 00nnnn 135xxx  SETDDE  Subtract Extensibly Targeted Double Decimal Exponent
141070 00nnnn 136xxx  METDDE  Multiply Extensibly Targeted Double Decimal Exponent
141070 00nnnn 137xxx  DETDDE  Divide Extensibly Targeted Double Decimal Exponent

In these instructions, the field marked xxx contains the destination register, the index register or source register, and the base register in the usual manner for memory-reference instructions. The field marked nnnn contains a twelve-bit target exponent value in excess-2,048 format, exceeding the exponent in the largest size of decimal exponent floating-point numbers.

For decimal fixed-point arithmetic where all the numbers involved have the same exponent value, only a small range of exponent values is useful, since otherwise multiplication and division cannot produce a usable result. However, the inputs to a targeted instruction may have any exponent, and so the target exponent of the result can be one applicable to holding the result of an operation on two operands whose exponents are themselves determined through previous targeted operations, but which differ from that which is specified for the result.

A targeted arithmetic operation has the final operand aligned so that its exponent has the value specified as the target. This permits fixed-point arithmetic to be carried out automatically, without separate instructions for alignment, and in addition it has the benefit that since the fixed-point quantities are valid floating-point quantities, they are tagged with an indication of their magnitude. Normally, fixed-point arithmetic depends on adjustment steps being carried out after multiplies and divides, and the fixed-point quantities, being no different from the patterns of bits that represent integers, can easily be used incorrectly in calculations that assume a different location of the radix point.

Extensibly targeted arithmetic operations are carried out without rounding, and overflows from the most significant part of the mantissa will be ignored unless integer overflows are trapped, so they behave like integer operations in this respect as well. Ordinary targeted arithmetic operations, on the other hand, do not do this, so as to produce valid numerical results that can be incorporated into floating-point calculations.

This is inspired by a capability provided by the NORC computer.


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